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document number: mc33186 rev. 8.0, 4/2013 freescale semiconductor ? technical data ? freescale semiconductor, inc. , 2007 - 2013. all rights reserved. *this document contains certain info rmation on a product under development. fre- escale reserves the right to change or discontinue this pr oduct without notice h-bridge driver the 33186 is a monolithic h-bridge ideal for fractional horsepower dc-motor and bi-directional thrust solenoid control. the ic incorporates internal control logi c, charge pump, gate drive, and low r ds(on) mosfet output circuitry. the 33186 is able to control continuous inductive dc load currents up to 5.0 a. output loads can be pulse width modulated (pwmed) at frequencies up to 10 khz. this device is powered by smartmos technology. the 33186 is parametrically specif ied over a temperature range of -40 ? c ? t a ? 125 ? c, 5.0 v ? v+ ? 28 v. the ic can also be operated up to 40 v with de-rating of the specifications. the ic is available in a surface mount power package with exposed pad for heat sinking. features ? overtemperature, short-circuit protection, and overvoltage protection against transients up to 40 v at vbat, typical ?r dson = 150 m ? for each output transistor at 25 ? c ? continuous dc load current 5.0 a (tc < 100 ? c ? ? output current limitation at typ 6.5 a +/- 20% ? short-circuit shutdown for output currents over 8.0 a ? logic inputs ttl/cmos compatible ? operating frequency up to 20 khz ? undervoltage disable function ? diagnostic output, 2 disable input ? coding input for alternative functions ? stable operation with an ex ternal capacitance of 47 ? f minimum at vbat figure 1. 33186 simplified block diagram h-bridge motor driver 33186 ordering information device (for tape and reel, add an r2 suffix) temperature range (t a ) package mc33186hvw1 - 40 to 125 c 20 hsop mc33186hvw2 vw suffix (pb-free) 98ash70702a 20-pin hsop 5.0 v v pwr motor mcu or dsp out2 out1 vbat cp pgnd sf in1 di1 in2 di2 33186
analog integrated circuit device data ? 2 freescale semiconductor 33186 internal block diagram internal block diagram figure 2. 33186 simplifi ed internal block diagram charge-pump overcurrent high side overcurrent current limit overtemperature current limitation logic undervoltage sf in1 in2 di1 di2 cod pgnd out2 out1 vbat cp gate control: 3-4 gate control: 1-2 internal 5.0 v vbat vbat low side
analog integrated circuit device data ? freescale semiconductor 3 33186 pin connections pin connections figure 3. 33186 pin locations table 1. 33186 pin description pin name description 9, 10, 11, 12 metal slug pgnd power ground. all the ground are connected together , they should be connected as short as possible on the pcb. 1agnd analog ground. all the ground are connected to gether, they should be c onnected as short as possible on the pcb. 2output status flag (sf) open drain output, active low. is set according to the truth table. when a fault appears, sf changes typically in less than 100 ms. 3,13 18, 19 inputs in1, in2, di1, di2, cod voltage controlled inputs with hysteresis 8cod when not connected or connected to gnd, a stored failure will be reset by change of the voltage- level on di1 or di2. when connected to vcc, the disable pin di1 and di2 ar e inactive. a stored failure will be reset by change of the voltage level on in1 or in2. 6, 7, 14, 15 out1, out2 h-bridge outputs with integrated freewheeling diodes. metal slug is connected transparent top view nc agnd in2 di1 cp vbat out2 out2 di2 pgnd pgnd sf vbat out1 out1 cod pgnd pgnd in1 vbat 1 2 3 4 5 6 7 8 9 10 20 19 16 15 14 13 12 11 18 17 to power ground
analog integrated circuit device data ? 4 freescale semiconductor 33186 pin connections 4, 5, 16 vbat the pins 4 and 5 are internally connected. thes e pins supply the left hi gh side and the analog/logic part of the device. the pin 16 supplies the right high side and the charge pump. the pins 4, 5 and 16 should be connected together on the printed circuit boar d with connections as short as possible. a v bat filter capacitor, minimum value 47 ? f, should always be employed to prevent ic damage from switching transients. supervision and protection functions a) supply voltage supervision the supply voltage is superv ised. if it is below its specific th reshold, the power stages are switched in tristate and the status flag is switched low. if the supply voltage is over the specific thresh old again, the power stage switches independently into normal operation, according to the input pins and the status flag is reset. b) thermal supervision in case of overtemperature, the power stages are switched in tristate independent of the inputs signals and the status flag is switched low. if the level changes from high to low on di1 (in1) or low to high on di2 (in2), the output stage switches on again if the temperature is below the sp ecified limit.the status-flag is reset to high level (pin names in brackets re fer to coding pin = vcc). c) supervision of overcurrent on high sides and low sides in case of overcurrent detection, the power stages are switched in tristate independent of the inputs signals and the status flag is set. if the level changes from high to low on di1 (in1) or low to high on di2 (in2) the output stage switches on again and the status flag is reset to high level (pin names in brackets refer to coding ? pin = vcc). the output stage switches into the mode defined by the inputs pins provided, and/if the temperature is below the specified limits. d) current limiting on low sides the maximum current which can flow under normal ope rating conditions is limited to imax = 6.5 a ? 20%. when the maximum current value is reached, the output stages are switched tristate for a fixed time. according to the time constant the curr ent decreases until the next switch on occurs. see page 9 for schematics. 17 cp charge pump output pin a filtering capacitor (up to 33 nf) can be connected between pin 17 and gnd. device can operate without external capacitor, although pin 17 decoupl ing capacitor help in noi se reduction and allows the device to perform a maximum speed, timing and pwm frequency. table 1. 33186 pin d escription(continued) pin name description
analog integrated circuit device data ? freescale semiconductor 5 33186 electrical characteristics maximum ratings electrical characteristics maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise no ted. exceeding these ratings may cause a malfunction or permanent damage to the device. ratings symbol min typ max unit electrical ratings supply voltage static destruction proof dynamic destruction proof t < 0,5 s v bat v bat - 1.0 - 2.0 ? ? 28 40 v logic inputs (in1, in2, di1, di2, code) u - 0.5 ? 7.0 v output status - flag sf u sf - 0.5 ? 7.0 v thermal ratings junction temperature t j - 40 ? +150 ? c storage temperature t s - 55 ? +125 ? c ambient temperature t a - 40 ? +125 ? c thermal resistance (with power applied on 2 power mos) rth jc ?? +1.5 k/w thermal resistance (with power applied on 2 power mos) rth jc ?? +1.5 k/w peak package reflow temperature during reflow (1) , (2) t pprt note 2. c notes 1. pin soldering temperature limit is for 10 seconds maximum dur ation. not designed for immersion soldering. exceeding these lim its may cause malfunction or permanent damage to the device. 2. freescale?s package reflow capability meets pb-free requirem ents for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), ? go to www.freescale.com, search by part number [e.g. remove pr efixes/suffixes and enter the core id to view all orderable parts . (i.e. mc33xxxd enter 33xxx), and review parametrics.
analog integrated circuit device data ? 6 freescale semiconductor 33186 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electrical characteristics characteristic noted under conditions -40 ? c to +125 ? c, vbat from 5.0 v to 28 v, unle ss otherwise note. typical values reflect approximate mean at 25 ? c, nominal v cc , at time of device characterization. characteristics symbol min typ max unit power supply operating range: static dynamic (t < 500 ms) v bat v bat 5.0 ? ? ? 28 40 v stand-by current f = 0 to 10 khz; iout = 0.0 a i v bat ? ?35 ma vbat-undervoltage switch-off (without load) switch-off voltage switch-on voltage hysteresis 4.15 4.5 150 4.4 4.75 ? 4.65 5.0 ? v v mv charge-pump supply vbat = 4.15 v vbat < 40 v v cp - v bat v cp - v bat 3.35 ? ? ? ? 20 v logic inputs input high vinh 3.4 ? ? v input low vinl ? ? 1.4 v input hysteresis u0.71.0?v input pull-up current (in1, in2, di1) uin = 0.0 v i - 200 - 80 ? ? a input pull-down current (di2,cod) (3) udi2 = 5.0 v i di2 ? 25 100 ? a power outputs: out1, out2 switch on resistance: r out - vbat ; r out - gnd vbat = 5.0 to 28 v; ccp = 0 to 33 nf ? ? 300 m ? switch-off current during current limitation on low sides (i out ) max 5.2 6.5 7.8 a switch-off time during current limitation on low sides t a 15 20.5 26 ? s blanking time during current limitation on low sides t b 12 16.5 21 ? s notes 3. in case of negative voltage at out2 (respectively out1) this maximum pull down current at di2 (respectively cod) pin can be exceeded. this happens during recirculation when t he current is flowing in the low side. see figure 22 .
analog integrated circuit device data ? freescale semiconductor 7 33186 electrical characteristics static electrical characteristics high side overcurrent detection (4) low side overcurrent detection i ochs i ocls 11 8.0 ? ? ? ? a leakage current output stage switched off ? ? 100 ? a freewheeling diode forward voltage iou = 3.0 a u d ??2.0 v freewheeling diode reverse recovery time ifm = 1.0 a, di/dt = 4.0 a/s t rr ?2.05.0 ? s switch-off temperature hysteresis 160 20 ? ? 190 30 ? c output status flag (open drain output) output high (sf not set) usf = 5.0 v i sf ? ?10 ? a output low (sf set) isf = 300 a vsf ? ? 1.0 v timing pwm frequency ccp = 33 nf f??10 khz maximum switching frequency during current limitation vbat = 6....28 v.....c cp = 33 nf f??20 khz output on delay in1 ..... > out1 or in2 ..... > out2 t don ??15 ? s output off delay in1 ..... > out1 or in2 ..... > out2 t doff ??15 ? s output switching time ccp = 0 to 33 nf outih ..... outil, outil ..... outih, iout = 3.0 a t r , t f 2.0 ? 5.0 ? s disable delay time dii ..... outi t ddis ??8.0 ? s turn off in case of overcurrent or overtemperature ?4.08.0 ? s power on delay time (ccp = 33 nf) (5) ?1.05.0 ms notes 4. in case of overcurrent, the time when the current is greater than 7.8 a is lower than 30 ? s, with a maximum frequency of 1.0 khz. 5. this parameter corresponds to the time for ccp to reach its nominal value when vbat is applied. table 3. static electric al characteristics(continued) characteristic noted under conditions -40 ? c to +125 ? c, vbat from 5.0 v to 28 v, unle ss otherwise note. typical values reflect approximate mean at 25 ? c, nominal v cc , at time of device characterization. characteristics symbol min typ max unit
analog integrated circuit device data ? 8 freescale semiconductor 33186 electrical characteristics truth table truth table table 4. truth table device state input conditions status outputs di1 (8) di2 (8) in1 in2 sf (9) sf (10) ou1 ou2 1-forward lhhlhh h l 2-reverse lhlhhh l h 3-free wheeling low lhllhh l l 4-free wheeling high lhhhhh h h 5-disable 1 hxxxlh z z 6-disable 2 xlxxlh z z 7-in1 disconnected lhzxhh h x 8-in2 disconnected lhxzhh x h 9-di1 disconnected zxxxlh z z 10-di2 disconnected xzxxlh z z 11-current limit.active lhxxhh z z 12-undervoltage (6) xxxxll z z 13-overtemperature (7) xxxxll z z 14-overcurrent (7) xxxxll z z notes 6. in case of undervoltage, tristate and status-flag are reset automatically. 7. whenever overcurrent or overtemperature is detected, the faul t is stored (i.e.status-flag remains low). the tristate conditio ns and the status-flag are reset via di1 (in1) or di2 (in2). pin names in brackets refer to coding pin ( cod = vcc ). 8. if cod = vcc then di1 and di2 are not active. 9. cod = nc or gnd 10. cod = vcc l = low h = high x = high or low z = high impedance (all output stage transistors are switched off).
analog integrated circuit device data ? freescale semiconductor 9 33186 electrical characteristics truth table figure 4. typical application figure 5. output delay time figure 6. disable delay time m micro controller 10 k voltage 47 f vbat regulator vcc ccp=33 nf vbat cp in1 sf power ground out1 out2 in2 di1 cod di2 gnd power ground 50% 50% 90% 10% t don t doff inn oun 10% 50% t ddis z din oun
analog integrated circuit device data ? 10 freescale semiconductor 33186 electrical characteristics truth table figure 7. output switching time 90% 10% 90% 10% tf tr oun
analog integrated circuit device data ? freescale semiconductor 11 33186 electrical characteristics truth table figure 8. current limitation on low side > 8a overturned a load- current typ 6.5a control signal status flag 6.5a overcurrent detection t a t b detail a t a = switch-off time in current limitation t b = current limitation blanking time
analog integrated circuit device data ? 12 freescale semiconductor 33186 electrical characteristics truth table figure 9. stand-by current vs. temperature figure 10. vbat undervoltage vs. temperature figure 11. low threshold input voltage vs. temperature figure 12. high threshold input voltage vs. temperature figure 13. vcp vs. battery voltage figure 14. r dson vs. temperature 10,5 11 t, temperature ( ? c) ivbat (ma) -50 0 25 100 -25 50 75 125 11,5 12 12,5 13,5 10 9,5 9 vbat=12v 13 4,60 4,70 t, temperature ( ? c) vbat(v) -50 0 25 100 -25 50 75 125 4,80 4,90 5,00 4,50 4,40 4,30 4,20 switch off voltage switch on voltage 1,83 1,84 t, temperature ( ? c) vinl (v) -50 0 25 100 -25 50 75 125 1,85 1,86 1,87 1,88 1,82 1,81 1,89 t, temperature ( ? c) vinh (v) -50 0 25 100 -25 50 75 125 2,77 2,78 2,79 2,80 2,81 2,82 2,76 2,75 2,83 battery voltage (v) vcp (v) 0 10 15 30 5202535 15 20 25 30 35 45 10 5 0 40 tambient=25c without ccp t, temperature ( ? c) r dson (m ? ) 150 160 -50 0 25 100 -25 50 75 125 170 180 190 140 130 120 200 vbat=5v without ccp 110
analog integrated circuit device data ? freescale semiconductor 13 33186 electrical characteristics truth table figure 15. switch off current vs. temperature figure 16. overcurrent detection vs. temperature figure 17. current limitation figure 18. switch off time figure 19. output switching time: t r figure 20. output switching time: t f t, temperature ( ? c) iout max (a) 6,70 6,80 -50 0 25 100 -25 50 75 125 6,90 7,00 7,10 6,30 6,60 6,50 6,40 7,20 t, temperature ( ? c) 14,50 15,00 -50 0 25 100 -25 50 75 125 15,50 16,00 16,50 17,50 14,00 13,50 13,00 17,00 high side switch iochs (a) imotor (1a/div) i(out) max= 7a imotor (1a/div) out1 (5v/div) out2 (5v/div) ta=20.5s out1 (5v/div) tr=3.7s out1 (5v/div) tf=2.6s
analog integrated circuit device data ? 14 freescale semiconductor 33186 electrical characteristics truth table figure 21. output off delay figure 22. output on delay figure 23. disable delay time figure 24. high side overcurrent high side detection figure 25. maximum di 2 input current vs. i out 2, current out1 (2v/div) in1 (1v/div) tdoff=12.5s out1 (2v/div) in1 (1v/div) tdon=5.8s di2 (1v/div) out1 (2v/div) tdiss=0.9s i(5a/div) iochs= 16a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 i out2 (a) note: current through internal recirculation diode, @125c in case of negative voltage at out2
analog integrated circuit device data ? freescale semiconductor 15 33186 packaging soldering packaging soldering the 20 hsop package is designed for enhanced thermal performance. the particularity of this package is its copper base plate on which the power die is soldered. the base plate is soldered on a pcb to provide heat flow to the ambient and also to provide a large thermal capacitance. of course, the more copper area on the pcb, the better the power dissipation and transient behavior. we characterized the 20 hsop on a double side pcb. the bottom side area of the copper is 7.8 cm 2 . the top surface is 2.7 cm 2 , see figure 26 . figure 26. pcb test layout figure 27. phsop20 thermal response figure 27 shows the thermal response with the device soldered on to the test pcb described on figure 26 . top side bottom side 0,1 1 10 100 0,001 0,01 0,1 1 10 100 1000 10000 t, time (s) rth (c/w)
analog integrated circuit device data ? 16 freescale semiconductor 33186 packaging package dimensions package dimensions important: package dimensions are provided in package drawings. to find the most current package outline drawing, go to www.freescale.com and perform a keyword search for the drawing?s document number. dimensions shown are provided for referenc e only (for layout and design, refer to the package outline drawing listed in the following figures). table 5. package drawing information package suffix package outline drawing number 20-pin hsop hvw 98ash70702a
analog integrated circuit device data ? freescale semiconductor 17 33186 packaging package dimensions vw (pb-free) suffix 20-pin hsop 98ash70702a issue c
analog integrated circuit device data ? 18 freescale semiconductor 33186 packaging package dimensions vw (pb-free) suffix 20-pin hsop 98ash70702a issue c
analog integrated circuit device data ? freescale semiconductor 19 33186 packaging package dimensions vw (pb-free) suffix 20-pin hsop 98ash70702a issue c
analog integrated circuit device data ? 20 freescale semiconductor 33186 additional documentation thermal addendum (rev 2.0) additional documentation thermal addendum (rev 2.0) introduction this thermal addendum is provided as a supplement to the mc33186 technical datasheet. the addendum provides therma l performance information that may be critical in the design and development of system applications. all electrical, application, and packaging informati on is provided in the datasheet. package and thermal considerations the mc33186 is offered in a 20 pin hsop exposed pad, single die package. there is a single heat source (p), a single junction temperature (t j ), and thermal resistance (r ? ja ). the stated values are solely for a th ermal performance comparison of one package to another in a standardized environment. this methodology is not meant to and will not predict the performance of a package in an application- specific environment. stated values were obtained by measurement and simulation according to the standards listed below. 20-pin hsop-ep 33186vw vw suffix (pb-free) 98ash70273a 20-pin hsop-ep note for package dimensions, refer to the 33186 data sheet. t j = r ? ja . p standards notes: 1. per jedec jesd51-2 at natural convection, stil l air condition. 2. 2s2p thermal test board per jedec jesd51-5 and ? jesd51-7. 3. per jedec jesd51-8, with the board temperature on the center trace near the center lead. 4. single layer thermal test board per jedec jesd51-3 and jesd51-5. 5. thermal resistance between the die junction and the exposed pad surface; cold plate attached to the package bottom side, remaining surfaces insulated. figure 28. thermal land pattern for direct thermal attachment according to jesd51-5 table 6. thermal performance comparison thermal resistance [ ? c/w] r ? ja (1) , (2) 29 r ? jb (2) , (3) 9.0 r ? ja (1) , (4) 69 r ? jc (5) 2.0 1.0 1.0 0.2 0.2 * all measurements ? are in millimeters soldermast ? openings thermal vias ? connected to top ? buried plane 20 pin hsop-ep 1.6 mm pitch 16.0 mm x 11.0 mm body 12.3 mm x 7.1 mm exposed pad
analog integrated circuit device data ? freescale semiconductor 21 33186 additional documentation thermal addendum (rev 2.0) figure 29. thermal test board device on thermal test board table 7. thermal resistance performance r ? ja ? is the thermal resistance between die junction and ambient air. a 33186vw pin connections 20-pin hsop-ep 1.6 mm pitch 16.0 mm x 11.0 mm body 12.3 x 7.1 mm exposed pad nc agnd in2 di1 cp vbat out2 out2 di2 pgnd pgnd sf vbat out1 out1 cod pgnd pgnd in1 vbat 1 2 3 4 5 6 7 8 9 10 20 19 16 15 14 13 12 11 18 17 material: single layer printed circuit board fr4, 1.6 mm thickness cu traces, 0.07 mm thickness outline: 80 mm x 100 mm board area, including edge connector for thermal testing area a: cu heat-spreading areas on board surface ambient conditions: natural convection, still air a [mm 2 ]r ? ja [ ? c/w] 070 300 49 600 47
analog integrated circuit device data ? 22 freescale semiconductor 33186 additional documentation thermal addendum (rev 2.0) figure 30. device on thermal test board r ? ja figure 31. transient thermal resistance r ? ja 1 w step response, device on thermal test board area a = 600 (mm 2 ) 0 10 20 30 40 50 60 70 80 heat spreading area a [mm2] thermal resistance [oc/w ] 0 300 600 r ? ja [ c/w] x heat spreading area a [mm 2 ] 0 300 600 thermal resistance [ ? c/w] 80 70 60 50 40 30 20 10 0 0.1 1 10 100 1.00e-03 1.00e-02 1.00e-01 1.00e+00 1.00e+01 1.00e+02 1.00e+03 1.00e+04 time[s] thermal resistance [oc/w] r ? ja [ c/w] x thermal resistance [ ? c/w] 100 10 1 0.1 time [s] 1.00e+04 1.00e+03 1.00e+02 1.00e+01 1.00e+00 1.00e-01 1.00e-02 1.00e-03
analog integrated circuit device data ? freescale semiconductor 23 33186 revision history revision history revision date description of changes 5.0 5/2006 ? implemented revision history page ? added lead free (pb-free) part number mc33186vw1 6.0 10/2006 ? updated data sheet formal ? removed peak package reflow temperature during reflow (solder reflow) parameter from maximum ratings on page 5 . added note with instructions to obtain this information from www.freescale.com . 7.0 10/2011 ? updated package dimensions according to the latest freescale package specification 98ash70702a_c ? updated to the current freescale form and style. 8.0 4/2013 ? removed mc33186dh1 and mc33186vw1 from the ordering information and added mc33186hvw1 and mc33186hvw2 to the ordering information ? added the sentence ?a v bat filter capacitor, minimum value 47 ? f, should always be employed to prevent ic damage from switching transients.? for pins 4,5 , and 16 in table 1 ? revised back page. updated document properti es. added smartmos sentence to first paragraph. updated form and style.
document number: mc33186 rev. 8.0 4/2013 information in this document is provided solely to enable sys tem and software implementers to use freescale products. there are no express or implied copyright licenses granted her eunder to design or fabricate any integrated circuits on the information in this document. freescale reserves the right to make changes without fu rther notice to any products herein. freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale data sheets and/or s pecifications can and do vary in diff erent applications, and actual performance may vary over time. all operating parameters, including ?typicals,? must be validated for each customer application by customer?s technical experts. freescale does not convey any license under its patent rights nor the rights of others. freescale sells products pursuant to standard terms and conditi ons of sale, which can be found at the following address: http://www.reg.net/v2/webservices/fr eescale/docs/termsandconditions.htm freescale and the freescale logo, are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. smartmos is a trademark of freescale semiconductor, inc. a ll other product or service names are the property of their respective owners. ? 2013 freescale semiconductor, inc. how to reach us: home page: freescale.com web support: freescale.com/support

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